As semiconductor device dimensions become finer and finer, it becomes increasingly difficult to obtain adequate step coverage within interconnect vias using metal that has been deposited by traditional deposition techniques. In addition, traditional methods of forming metal interconnect lines are affected by particle contamination and defective metal layer etches. Generally, particle contamination is responsible for open circuits in the metal interconnect system, while a defective etch of a metal layer may result in both shorted and open circuits.
Another problem associated with the creation of metal interconnect lines is that metal layers are relatively difficult to etch as compared, for example, to silicon dioxide. As device dimensions become smaller, electromigration becomes a more significant problem. Since electromigration in semiconductor devices is generally associated with the use of pure aluminum for interconnect lines, the problem is most easily eliminated by alloying other metals, such as copper, with aluminum. However, alloys of aluminum that do not exhibit at least minimal grainboundary diffusion in the presence of an electric current are generally relatively difficult to etch using plasma or reactive-ion etching techniques.
What is needed is a new technique for creating metal interconnect lines and via plugs from ductile metal alloys which do not exhibit pronounced electromigration characteristics. In addition, the technique should provide improved step coverage over prior art processes and should eliminate the metal etch step altogether.
After the metal for the interconnect lines and vias has been deposited on the substrate, it is necessary to remove the excess metal from the surface of the wafer to define the electrically isolated interconnect lines. One such method of achieving this metal removal is with a slurry polish. Here, the wafer surface is impacted with a stream of liquid containing an abrasive agent (collectively, a slurry) to cause excess surface metal to be removed. This process must be carefully controlled with a defined end point to assure that no more material is removed than is desired.
This invention also comprises an improved method for removing the excess metal from the surface of the wafer to define the electrically isolated interconnect lines.